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Apple(我所在的组)招 ASIC Enginee,有好几个opening,非常希望国人加入!如果感兴趣请发简历至. 简历楼主会筛选
一下,如果没问题可以直接递给hiring manager. 楼主是做硬件的,没法推荐软件的工作,抱歉~
. check 1point3acres for more.
如果是new grad,只需要名校+high GPA,这样容易过简历关
如果是有经验的在职跳槽,需要design process 包括 coding micro
architecture synthesis timing CDC等等都有很好的理解
familiar with AXI protocol and design is a plus..
不需要太多的 data process knowledge but need to be excellent about control
flow and handshake
具体如下 ..
Key Qualification:
RTL Logic Design experience of multi-million gate ASICs . 1point 3acres
Hands on experience in all aspects of the chip development process with
proficiency in front end tools and methodologies. 1point3acres
Experience writing specifications and converting them to design.--
Experience with multiple clock domains and asynchronous interfaces .google и
Experience or knowledge of system architecture, CPU & IP Integration, and
power and clock management designs is highly desirable . Χ
Ability to communicate effectively across all internal groups
Familiarity with software and operating concepts a plus
Familiarity with scripting languages like Perl or Tcl a plus. From 1point 3acres bbs
Job Description:. check 1point3acres for more.
As an ASIC Design Engineer, you will have responsibilities spanning various
aspects of SOC design:. Χ
Write microarchitecture and/or design specifications
Design, implement, and debug complex logic designs
Integrate complex IPs into the SOC. check 1point3acres for more.
Support all front end integration activities like Lint, CDC, Synthesis, and
ECO
Work with other engineers that are members of the SOC Design, SOC Design
Verification, Emulation, STA
公司常年招DV Engineer, General or Specific area 的都可以. .и
| . 1point 3 acres
补充内容 (2018-10-5 22:41):
这似乎是系统自动发的帖,现在暂时不接受内推了。楼主已联系管理员删帖,见谅 |