The Hardware/Software Interface (Lab 4)

Lab 4: Cache GeometriesOverview

Chip D. Signer, Ph.D, is trying to reverse engineer a competitor's microprocessors to discover their cache geometries and has recruited you to help. Instead of running programs on these processors and inferring the cache layout from timing results, you will approximate his work by using a simulator.

This lab should be done on a 64-bit machine. Use the provided VM or your own personal 64-bit computer (but at least check your solutions on the VM).

主要讲了缓存结构，有微机原理基础的话应该不难~

为什么没有lab2的帖子？