号称要学Verilog/VHDL的网友请进

无论是自学也好还是上课做project不得不学也好，看完下面这段话，聪明的人可以看出来HDL语言对于一个学数字系统设计的人来说究竟有多大重要性，需不需要一切围着它转。

Hardware description languages (HDLs) are extremely important tools
for modern digital designers. Once you have learned Verilog or VHDL,
you will be able to specify digital systems much faster than if you had to
draw the complete schematics. The debug cycle is also often much faster,
because modifications require code changes instead of tedious schematic
rewiring. However, the debug cycle can be much longer using HDLs if
you don’t have a good idea of the hardware your code implies.

HDLs are used for both simulation and synthesis. Logic simulation
is a powerful way to test a system on a computer before it is turned into
hardware. Simulators let you check the values of signals inside your system
that might be impossible to measure on a physical piece of hardware.
Logic synthesis converts the HDL code into digital logic circuits.

The most important thing to remember when you are writing HDL
code is that you are describing real hardware, not writing a computer
program. The most common beginner’s mistake is to write HDL code
without thinking about the hardware you intend to produce. If you
don’t know what hardware you are implying, you are almost certain not
to get what you want. Instead, begin by sketching a block diagram of
your system, identifying which portions are combinational logic, which
portions are sequential circuits or finite state machines, and so forth.
Then write HDL code for each portion, using the correct idioms to
imply the kind of hardware you need.

Digital Design and Computer Architecture --- David Harris

这本书《数字设计与计算机体系结构》看完了
Verilog和VHDL也学完了

感觉大牛的话是站在太高的角度，先coding一年以上就对语言熟悉得差不多了，而且确实是方案比代码重要，语言只是一种可综合的描述。
但是由于现在大部分是基于IP复用的设计，可以说前几年的时候关注信号传输与功能而已，只能说信号模块在心中，还谈不上电路在心中。

liuzhe0320 发表于 2012-10-25 08:21
所以数字电路比模拟电路好找工作并不能笼统的归咎为数字电路要写verilog，更像码农。同样地，在学习数字系 ...

弱弱问一下，那如果是用FPGA写HDMI， Ethernet之类的interface的时候呢。 觉得那些情况和LZ描述的数字电路之类的差别不小，偏嵌入式呢

haoziadad 发表于 2015-4-9 22:58
看完突然想起来本科毕设的那段VerilogHDL 当时写的叫一个纠结啊  现在想找本书系统的入门一下不知有没有推 ...

入门的话这本还不错  http://www.amazon.com/FPGA-Proto ... by+Verilog+examples

笨，看不懂。 聪明人，你说一下到底重不重要嘛？

语言只是一种工具，只有做到看到代码脑海中反映出电路才能去做设计工作

好东西啊

这段说得很好啊。。when you are writing HDL
code is that you are describing real hardware, not writing a computer
program

agenhcx 发表于 2012-10-24 14:16
这段说得很好啊。。when you are writing HDL
code is that you are describing real hardware, not writi ...

en, 顶这句，我们professor每次说道hdl就说这个。。。。

所以数字电路比模拟电路好找工作并不能笼统的归咎为数字电路要写verilog，更像码农。同样地，在学习数字系统设计基础知识以前自学verilog其实没什么必要。

liqiyang1908 发表于 2015-3-21 13:54
弱弱问一下，那如果是用FPGA写HDMI， Ethernet之类的interface的时候呢。 觉得那些情况和LZ描述的数字电 ...

我感觉Interface只负责收发，数据要怎么产生/处理是程序的事吧

Opencores上面有各种IP