ASML Senior FPGA Design Engineer 组内直推

ASML San Jose 组内直推FPGA Design Engineer, 应届毕业生/跳槽均可，会根据面试结果给level。需要你有过硬的verilog/vhdl基础。欢迎感兴趣的做数字电路设计、FPGA 设计， ASIC设计前端方向的小伙伴申请，请发一个你的简历和简短的自我介绍给我。看到合适的我会直接跟hiring manager内推， 最快一周可以面试。

感兴趣请发邮箱：附上你自己的简略自我介绍，简历，和你的email
zjfalbert@gmail.com

[b]详细要求如下：
Education and experience[/b]
MSEE with 0~3 years of work experience and/or PhD 0~1 years, Electrical Engineering.
Strong Verilog or VHDL coding skills.
Good TCL coding skills.
Experience developing FPGA system designs with deep understanding of timing closures.
Familiarity with computer system architectures or SOC architectures.
Good hardware knowledge.
Experience on high speed communication interface such as SERDES and 10G ethernet.
Excellent English communication skills.
Strong working knowledge of MS Office applications including Word, Excel, PowerPoint and Outlook.
Superior trouble shooting skills.
Experience on Linux system and C coding is a plus.
Skills
Working at the cutting edge of tech, you’ll always have new challenges and new problems to solve – and working together is the only way to do that. You won’t work in a silo. Instead, you’ll be part of a creative, dynamic work environment where you’ll collaborate with supportive colleagues. There is always space for creative and unique points of view. You’ll have the flexibility and trust to choose how best to tackle tasks and solve problems.
To thrive in this job, you’ll need the following skills:
Self-motivated, have a keen eye to identify bottleneck/risks and drive improvement
Good problem-solving skill
Work smarter, not harder.
Can learn and apply new information, tools or skills.
Must be able to read and interpret data, information, and documents.
Strong customer focus and commitment to customer satisfaction through prioritization, quality, efficiency and professionalism.
Ability to complete assignments with attention to detail and high degree of accuracy.
Proven ability to perform effectively in a demanding environment with changing workloads.
Result driven-demonstrate ownership and accountability.
Work independently or as part of a team and follow through on assignments with minimal supervision.
Demonstrate open, clear, concise and professional communication.
Ability to establish and maintain cooperative working relationships with co-workers and customer.
Work according to a strict set of procedures within the provided timelines.



补充内容 (2022-04-01 06:06 +08:00):
另外求大米 谢谢大家了TT

补充内容 (2022-04-04 02:39 +08:00):
近期发我简历的都已refer

zhandaxia 发表于 2022-3-31 13:43
lz方便透露下你们ct site的工资待遇么？前同事年初去了你们asml做fpga，因为是老外一直没好意思问待遇

san jose 是ASML-HMI，主要做光刻的检测设备，华人很多，很友好。
CT是光刻设备的组装和设计，基本不sponsor。

lz方便透露下你们ct site的工资待遇么？前同事年初去了你们asml做fpga，因为是老外一直没好意思问待遇

zhandaxia 发表于 2022-03-31 13:43:37
lz方便透露下你们ct site的工资待遇么？前同事年初去了你们asml做fpga，因为是老外一直没好意思问待遇

CT site不是很了解 我们是San Jose design site 跟我们并不是一个系统

星海之心 发表于 2022-3-31 18:03
CT site不是很了解 我们是San Jose design site 跟我们并不是一个系统

好的，多谢了！

邮件已发 谢谢楼主

heatinglemon 发表于 2022-4-1 09:36
邮件已发 谢谢楼主

好的，周末我统一看一下简历

矿大男神 发表于 2022-4-1 10:23
san jose 是ASML-HMI，主要做光刻的检测设备，华人很多，很友好。
CT是光刻设备的组装和设计，基本不spo ...

哈哈是的，CT好像是不做design的。

目前已发offer，所以暂时没有新的opening了，谢谢大家的简历，如果未来有新的opening会再发内推谢谢