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[我司要招人] 分享Intel招intern SVE Engineering Intern (BS Level) 2014【长度=六个月】

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NicklX | 只看该作者 |倒序浏览
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2014(7-9月)-CS本科+fresh grad 无实习或全职 | 网上海投| 码农类General实习@

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今天被Linkedin垃圾邮件吵醒

. Waral dи,是intel
http://www.linkedin.com/jobs2/view/10108821?trk=rj_em


我只有summer 没有6个月的时间 = = 于是痛哭流涕。
话说要求其实很低,但是,但是:
- Minimum of 3 months experience with Verilog or System Verilog
- Must have minimum GPA of 3.0 and be available to work for at least 6 months ..
Preferred Qualifications:
- Minimum of 3 months experience using logic analyzers or oscilloscopes

GPA不是问题,但是那个软件(语言?)名字是神马?!
anyway,分享给需要的人。

SVE Engineering Intern (BS Level) 2014Intel - US-California, FolsomPosted 3 days ago. ----




Job description

Come intern with Intel's System Validation Grroup( SVE). Our Validation Logic Design team develops I/O device controllers that stretch the limits of I/O protocols like next-generation versions of USB and PCI-express. Our device controllers are used to test upcoming products that implement new I/O specs. You will work closely with design engineers to develop and test new I/O device controllers and debug issues reported by customers..google  и

Responsibilities may be quite diverse in a technical nature and will vary significantly depending on the unique needs of the role, U.S. experience and education requirements. Job assignments may be for the summer or for short periods throughout the school year.
.--
The ideal candidate should exhibit the following behavioral traits:
- Problem-solving skills
- Ability to multitask
- Strong written and verbal communication skills
- Ability to work in a dynamic and team oriented environment
Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your school work/classes/research and/or relevant previous job and/or internship experiences. . .и
. 1point 3acres
Minimum Qualifications:
- Must be pursuing a BS in Electrical Engineering, Computer Engineering, Computer Science or other science/engineering related field
- At the BS level only, must have the unrestricted right to work in the US without requiring sponsorship
- Minimum of 3 months experience with software/programming languages (i.e. C, C++, Perl, Python, Java, etc.)
- Minimum of 3 months experience with Verilog or System Verilog
- Must have minimum GPA of 3.0 and be available to work for at least 6 months
Preferred Qualifications:
- Minimum of 3 months experience using logic analyzers or oscilloscopes




About this companyFollow company
Creating and extending computing technology to connect and enrich the lives of every person on Earth--that's our vision, is it yours? We are changing the world at Intel. Through our technical innovation, our endless efforts in education, environmental sustainability, healthcare, and much, much more.

The range of computing products based on Intel® architecture goes beyond PCs and servers and extends to phones, tablets, consumer electronics devices, and more. We are the world's largest semiconductor chip maker, based on revenue. Platforms are designed and configured to work together to provide an optimized user computing solution--one that is seamless, connected and puts the user at the center.
. Waral dи,
Step inside our world and you’ll find one brilliant mind after another working together in a spirit of collaboration that is simply contagious. And through this shared dedication—this culture of innovation and exploration—we do more than deliver the latest technologies. We deliver the future. See for yourself. Look Inside.

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. 1point 3 acres

Other jobs at IntelView more jobs at Intel.google  и


. 1point 3acres

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Intel的夏季实习不招没绿卡的人,而且拿job posting来发“我这里要招人” 不符合要求  发表于 2013-12-27 12:25

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参与人数 1大米 +3 收起 理由
数字媒体技术 + 3 欢迎来介绍你知道的情况

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Emmon1990 2013-12-27 12:26:19 | 只看该作者
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Intel的夏季实习不招没绿卡的人,而且拿job posting来发“我这里要招人” 不符合要求吧,,你这也太误导了

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参与人数 1大米 +1 收起 理由
admit + 1 补充一句Intel lab招国际学生

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Dincyfeng 2013-12-27 12:42:35 | 只看该作者
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学EE的刚开始最好不要做SVE,学到的东西比较有限,方向比较窄
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